Type:
Conference
Description:
Very high voltage breakdown pHEMTs have been successfully developed by implementing a field-plate (FP) gate structure. Devices with and without FP, in which the FP is simply connected to the gate contact, have been fabricated on the same wafer in order to compare the improvements induced by adopting the FP. As expected FP devices showed smaller drain current dispersion than standard devices under pulsed DC measurement conditions. Moreover off-state breakdown voltage improved from-25 V, for the devices without FP, up to-40 V for the field-plated devices. Electron Beam Lithography of the gate with Lg= 0.25 µm and i-line Stepper Lithography with Lg= 0.5 µm devices results have been compared. FP devices with effective gate length of 0.6 µm yielded output power levels as high as 1.6 W/mm CW@ 4 GHz with PAE up to 50%. FP devices with effective gate length of 0.3 µm yielded a maximum available gain@ 10 GHz as high as 13 dB (Vds= 8V) and 10 dB for Vds= 15V. The fabricated structures were also evaluated by carrying out 2D numerical simulations. Experimental results on MISpHEMT devices have been explained by means of a donor trap located at the dielectric/semiconductor (namely SiN/GaAs) interface.
Publisher:
Publication date:
1 Jan 2007
Biblio References:
Origin:
31th Workshop on Compound Semiconductor Devices and Integrated Circuits (WOCSDICE 2007)